Title :
Clock sensitivity reduction in echo cancellers
Author_Institution :
British Telecom Research Laboratories, Ipswich, UK
Abstract :
An algorithm is presented which enables echo cancellers to track rapid sample phase variations.
Keywords :
digital communication systems; echo suppression; algorithm; clock sensitivity; echo cancellers; jitter compensation; reduction; track rapid sample phase variations;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19850412
