DocumentCode
1003301
Title
Substrate noise-coupling characterization and efficient suppression in CMOS technology
Author
Yeh, Wen-Kuan ; Chen, Shuo-Mao ; Fang, Yean-Kuen
Author_Institution
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Taiwan
Volume
51
Issue
5
fYear
2004
fDate
5/1/2004 12:00:00 AM
Firstpage
817
Lastpage
819
Abstract
This brief investigates the substrate noise coupling using S-parameters measurement. Radio frequency domain analysis shows that the noise isolation is strongly dependent on layout geometry, including the parameters such as p-n junction, physical separation distance, guard ring (GR), and deep n-well (DNW). We found that the noise coupling can be efficiently diminished by incorporating GR and DNW structures.
Keywords
CMOS integrated circuits; S-parameters; electromagnetic coupling; integrated circuit layout; integrated circuit noise; p-n junctions; CMOS technology; DNW; GR; RF domain analysis; S-parameters; deep n-well; guard ring; layout geometry; noise isolation; p-n junction; physical separation distance; radio frequency; substrate noise-coupling; CMOS technology; Coupling circuits; Geometry; Isolation technology; Mobile communication; Noise measurement; Radio frequency; Scattering parameters; Testing; Very large scale integration; DNW; GR; RF; Radio frequency; deep n-well; guard ring; substrate noise coupling;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2004.825814
Filename
1303844
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