• DocumentCode
    1003699
  • Title

    Self-alignment a-Si FET by using a lift-off technique

  • Author

    Okada, H. ; Uchida, Y. ; Watanabe, Y. ; Matsumura, M.

  • Author_Institution
    Tokyo Institute of Technology, Department of Physical Electronics, Tokyo, Japan
  • Volume
    21
  • Issue
    15
  • fYear
    1985
  • Firstpage
    633
  • Lastpage
    634
  • Abstract
    New self-alignment amorphous-silicon field-effect transistors (a-Si FETs) have been proposed and demonstrated. This method uses lift-off and ion-implantation techniques, and no voltage offset was observed. Simple analysis indicates that this structure may be used to produce devices with channel lengths down to 5 ¿m.
  • Keywords
    amorphous semiconductors; field effect transistors; ion implantation; lithography; silicon; a-Si FET; channel lengths; ion-implanted techniques; lift-off technique; self-alignment;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19850448
  • Filename
    4250639