Title :
n+ self-aligned-gate AlGaAs/GaAs heterostructure FET
Author :
Mizutani, T. ; Arai, K. ; Oe, K. ; Fujita, S. ; Yanagawa, F.
Author_Institution :
NTT Atsugi Electrical Communication Laboratories, Atsugi, Japan
Abstract :
The n+ self-aligned-gate technology for high-performance AlGaAs/GaAs heterostructure FETs employing rapid lamp annealing have been studied. The large transconductance of 330 mS/mm at 300 K and 530 mS/mm at 83 K was obtained for the 0.7 ¿m gate length device, by reducing the source resistance to 0.6 ¿mm. The minimum delay time of 18.7 ps was obtained with a power dissipation of 9.1 mW at 300 K. The standard deviation of the delay time was as small as 1.1 ps at a fixed bias of 2.5 V.
Keywords :
III-V semiconductors; aluminium compounds; field effect transistors; gallium arsenide; AlGaAs/GaAs heterostructure; FET; III-V semiconductors; delay time; minimum delay time; n+ self-aligned-gate technology; power dissipation; rapid lamp annealing; source resistance; transconductance;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19850452