• DocumentCode
    1004055
  • Title

    Systolic encoder for fast waveform vector quantisation

  • Author

    Wang Chin-Liang ; Wei Che-Ho ; Chen Sin-Horng

  • Author_Institution
    National Chiao Tung University, Institute of Electronics, Hsin-Chu, Republic of China
  • Volume
    21
  • Issue
    16
  • fYear
    1985
  • Firstpage
    682
  • Lastpage
    684
  • Abstract
    The letter presents a systolic architecture that can efficiently perform the encoding operations of waveform vector quantisation using the squared-error distortion measure. In the system, squared-error cells and comparing cells are used to achieve modularity and concurrency. An index offset approach is employed for reducing I/O pins.
  • Keywords
    analogue-digital conversion; encoding; comparing cells; concurrency; encoding operations; fast waveform vector quantisation; index offset approach; modularity; reducing I/O pins; squared-error cells; squared-error distortion measure; systolic architecture; systolic encoder;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19850483
  • Filename
    4250690
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1004055