• DocumentCode
    1004622
  • Title

    High-accuracy pipeline A/D convertor configuration

  • Author

    Temes, G.C.

  • Author_Institution
    University of California, Department of Electrical Engineering, Los Angeles, USA
  • Volume
    21
  • Issue
    17
  • fYear
    1985
  • Firstpage
    762
  • Lastpage
    763
  • Abstract
    A novel pipeline A/D convertor configuration is proposed which appears to have some speed and accuracy advantages over earlier schemes. Circuits are also given for the compensation of the DC offset voltages of the input S/H stages, and for increasing the time available for signal acquisition.
  • Keywords
    analogue-digital conversion; error compensation; pipeline processing; A/D converter; ADC; DC offset voltages; compensation; input sample/hold stages; pipeline configuration;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19850537
  • Filename
    4250752