An Infinite Phase Shift Delay-Locked Loop With Voltage-Controlled Sawtooth Delay Line

Author

Chen, Chao-Chyun ; Liu, Shen-Iuan

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei

Volume

43

Issue

11

fYear

2008

Firstpage

2413

Lastpage

2421

Abstract

A wide-range delay-locked loop (DLL) with infinite phase shift and digital-controlled duty cycle is presented. By changing the polarity of the input clock of the voltage-controlled sawtooth delay, this proposed DLL achieves infinite phase shift by only a single loop. The proposed DLL has been fabricated in a 0.18 mum CMOS process and the core area is 0.45×0.3 mm<sup>2</sup>. The measurement results show the proposed DLL operates from 50 to 500 MHz. The duty cycle of the output clock can be adjusted from 30% to 60% in the step of 5%. At 500 MHz, the measured rms jitter and peak-to-peak jitter is 1.43 and 11.1 ps, respectively. Its power consumption is 6 mW for a supply of 1.5 V.

Keywords

CMOS digital integrated circuits; UHF phase shifters; VHF circuits; active networks; clocks; delay lines; delay lock loops; jitter; phase locked loops; CMOS process; DLL fabrication; digital-controlled duty cycle; frequency 50 MHz to 500 MHz; infinite phase shift delay-locked loop; input clock polarity; measured rms jitter; peak-to-peak jitter; power 6 mW; size 0.18 mum; time 1.43 ps; time 11.1 ps; voltage 1.5 V; voltage-controlled sawtooth delay line; wide-range delay-locked loop; CMOS process; Chaos; Circuits; Clocks; Delay lines; Energy consumption; Frequency synchronization; Jitter; Microprocessors; Voltage; Clock synchronization; delay-locked loop (DLL); dual-loop DLL; duty cycle; infinite phase shift; jitter;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2008.2004532

Filename

4685987