DocumentCode :
1005846
Title :
Single-event performance of COTS-based MPU under flare and nonflare conditions
Author :
Kimura, Shinichi ; Yamamoto, Hiroshi ; Nagai, Yasufumi ; Akioka, Maki ; Hashimoto, Hidekazu ; Takahashi, Nobuhiro ; Kato, Matsuaki ; Yoshihara, Keisuke
Author_Institution :
Smart Satellite Technol. Group, National Inst. of Inf. & Commun. Technol., Tokyo, Japan
Volume :
41
Issue :
2
fYear :
2005
fDate :
4/1/2005 12:00:00 AM
Firstpage :
599
Lastpage :
607
Abstract :
We investigated the in-orbit performance of a high-performance on-board computer developed with commercial off-the-shelf (COTS) technology in terms of its performance during the occurrence of single event effects. The processor worked and performed successfully both under normal and under solar flare conditions in 800 km altitude polar orbit. During a solar flare, the occurrence of single events increased by a factor of more than four compared with normal conditions. The area where single events occurred during the solar flare spread to the polar region, whereas normally they are limited to the region of South-Atlantic anomalies (SAA). Our results suggest that the performance of our COTS processor is sufficient for future space applications.
Keywords :
aerospace computing; microcomputers; microprocessor chips; solar flares; space vehicle electronics; 800 km; COTS processor; COTS-based MPU; commercial off-the-shelf technology; high-performance on-board computer; in-orbit performance; microprocessors; nonflare conditions; single event effects; solar flare conditions; space vehicle electronics; Aerospace electronics; Artificial satellites; Communications technology; Earth; High performance computing; Microelectronics; Observatories; Protons; Single event upset; Space technology;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9251
Type :
jour
DOI :
10.1109/TAES.2005.1468751
Filename :
1468751
Link To Document :
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