DocumentCode
1006047
Title
Monolithic integrated 4:1 multiplexer and demultiplexer operating up to 4.8 Gbit/s
Author
Yoshikai, N. ; Kawanishi, Satoki ; Suzuki, M. ; Konaka, Shogo
Author_Institution
NTT Yokosuka Electrical Communication Laboratory, Yokosuka, Japan
Volume
21
Issue
4
fYear
1985
Firstpage
149
Lastpage
151
Abstract
The letter describes the high-speed performance of a 4:1 time-division MSI multiplexer and demultiplexer, which are fabricated using advanced super self-aligned process technology (SST). The maximum operation speed of the multiplexer is 5.02 GHz under 576 mW power dissipation. The system, which is composed of a multiplexer and a demultiplexer, operates at up to 4.80 GHz. The demultiplexer has a power dissipation of 1148 mW. Interchannel interference is also examined.
Keywords
bipolar integrated circuits; digital communication systems; digital integrated circuits; multiplexing equipment; optical communication equipment; time division multiplexing; 4.8 Gbit/s; 4:1 multiplexer; 576 mW power dissipation; MSI; Si bipolar process; TDM; demultiplexer; digital IC; interchannel interference; optical fibre transmission; super self-aligned process technology; time-division;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19850106
Filename
4250923
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