• DocumentCode
    1006635
  • Title

    Decimal frequency offset estimation in COFDM wireless communications

  • Author

    Ai, Bo ; Ge, Jian-Hua ; Wang, Yong ; Yang, Shi-yong ; Liu, Pei

  • Author_Institution
    Nat. Key Lab. of Integrated Service Networks, Xidian Univ., Xi´´an, China
  • Volume
    50
  • Issue
    2
  • fYear
    2004
  • fDate
    6/1/2004 12:00:00 AM
  • Firstpage
    154
  • Lastpage
    158
  • Abstract
    Timing jitter, frequency offset, carrier phase jitter and sampling clock frequency offset are the main synchronization errors encountered by OFDM systems. As many literature studies have proved, OFDM systems are very sensitive to frequency errors. In this paper, an improved method for decimal frequency offset estimation in time domain is proposed. In addition, lots of simulations have proved that when the decimal frequency offset in data streams approaches 0.5 of the subcarrier spacing, a wrong estimated frequency offset with inverse polarity will be presented, and therefore, a novel adjusting model to deal with this problem is also proposed in this paper. Simulation results show that the mean square error (MSE) can be significantly improved by over three orders of magnitude at high SNR with the proposed method compared with the conventional method. The corresponding field programmable gate array (FPGA) circuit through test in HDTV prototype in Team of Engineering Expert Group (TEEG) proves its feasibility and availability.
  • Keywords
    OFDM modulation; digital television; field programmable gate arrays; frequency estimation; high definition television; integrated circuit testing; jitter; synchronisation; telecommunication equipment testing; television broadcasting; television equipment; time-domain analysis; timing; COFDM wireless communications; FPGA; HDTV prototype; MSE; OFDM systems; SNR; adjusting model; carrier phase jitter; data streams; estimated frequency offset inverse polarity; field programmable gate array circuit test; frequency errors; frequency offset; mean square error; sampling clock frequency offset; simulations; subcarrier spacing; synchronization errors; time domain decimal frequency offset estimation; timing jitter; Circuit simulation; Circuit testing; Clocks; Field programmable gate arrays; Frequency estimation; Frequency synchronization; OFDM; Sampling methods; Timing jitter; Wireless communication; COFDM; FPGA; HDTV; frequency offset estimation;
  • fLanguage
    English
  • Journal_Title
    Broadcasting, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9316
  • Type

    jour

  • DOI
    10.1109/TBC.2004.828367
  • Filename
    1304949