• DocumentCode
    1007714
  • Title

    Testability enhancement of domino CMOS logic

  • Author

    Pretorius, J.A. ; Shubat, A.S. ; Salama, C.A.T.

  • Author_Institution
    University of Toronto, Department of Electrical Engineering, Toronto, Canada
  • Volume
    21
  • Issue
    8
  • fYear
    1985
  • Firstpage
    336
  • Lastpage
    337
  • Abstract
    A simple circuit technique to enhance the testability of domino CMOS circuits is presented. The fact that domino CMOS gates always have their outputs precharged low enables one to test for output stuck-at-one faults by a simple modification of the domino gate.
  • Keywords
    CMOS integrated circuits; integrated logic circuits; logic design; logic testing; domino CMOS logic; domino gate modification; logic design; output stick-at-one faults; testability;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19850237
  • Filename
    4251092
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1007714