Fabrication and performance of all refractory josephson logic circuits for 1 Kbit SFQ memory

All refractory Josephson loop logic circuits for a 1Kbit SFQ memory have been developed. The circuit fabircation technology, using NbN/Nb double layered junction formation and reactive ion etching(RIE)with a 2.5μm minimum feature size and 1.5μm overlay registration, has been utilized. A highly selective and anisotropic RIE process has been performed, in which a CCl2F2+ Ne gas mixture has been used as etching gases. The experimental circuit consists of address decoders and line drivers, which are based on the principle of current steering in superconducting loops. The decoder and driver were successfully operated with the gate current margin of ±18% and ±14%, respectively. The decoder internal delay time was measured to be about 1.5 ns. It is revealed that these circuits have a satisfactory preformance to be used in the 1Kbit SFQ memory.