DocumentCode
1010260
Title
Au/TiN/WSi-gate self-aligned GaAs MESFETs using rapid thermal annealing method
Author
Imamura, Kousuke ; Ohnishi, Tadasuke ; Shigaki, M. ; Yokoyama, Naoki ; Nishi, Hidetaka
Author_Institution
Fujitsu Laboratories Ltd., Atsugi, Japan
Volume
21
Issue
18
fYear
1985
Firstpage
804
Lastpage
805
Abstract
Au/TiN/WSi-gate self-aligned GaAs MESFETs were fabricated using the rapid thermal annealing method to reduce the gate resistance of the FETs. The gate resistance Rg was 4.2 ¿ (Lg=1.5 ¿m, Wg=400 ¿m), just 1/20 of that of the WSi-gate FET. The maximum frequency of oscillation fmax of the Au/TiN/WSi-gate FETs was improved to be about twice that of WSi-gate FETs.
Keywords
III-V semiconductors; Schottky gate field effect transistors; annealing; gallium arsenide; semiconductor technology; Au/TiN/WSi-gate; gate resistance; maximum oscillation frequency; rapid thermal annealing; self-aligned GaAs MESFETs;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19850567
Filename
4251366
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