DocumentCode
1010823
Title
Experimental verification of a VMOS UHF power transistor model and design
Author
Plessis, M. Du ; Rademeyer, P.
Author_Institution
University of Pretoria, Carl & Emily Fuchs Institute for Microelectronics, Pretoria, South Africa
Volume
21
Issue
19
fYear
1985
Firstpage
881
Lastpage
882
Abstract
A high-frequency model for VMOS power transistors has been developed. Using this model a VMOS transistor was designed to achieve 10 dB maximum stable gain at a frequency of 1 GHz. In the design the static parameters of breakdown voltage and on-resistance were also optimised. The experimental results verified the model and showed excellent agreement.
Keywords
insulated gate field effect transistors; power transistors; semiconductor device models; UHF; VMOS; breakdown voltage; high-frequency model; maximum stable gain; on-resistance; power transistor model; static parameters;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19850622
Filename
4251424
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