Berkeley reliability tools-BERT

Author

Tu, Robert H. ; Rosenbaum, Elyse ; Chan, Wilson Y. ; Li, Chester C. ; Minami, Eric ; Quader, Khandker ; Ko, Ping Keung ; Hu, Chenming

Author_Institution

Dept. of Electr. Eng., California Univ., Berkeley, CA, USA

Volume

12

Issue

10

fYear

1993

fDate

10/1/1993 12:00:00 AM

Firstpage

1524

Lastpage

1534

Abstract

Berkeley reliability tools (BERT) simulates the circuit degradation (drift) due to hot-electron degradation in MOSFETs and bipolar transistors and predicts circuit failure rates due to oxide breakdown and electromigration in CMOS, bipolar, and BiCMOS circuits. With the increasing importance of reliability in today´s and future technology, a reliability simulator such as this is expected to serve as the engine of design-for-reliability in a building-in-reliability paradigm. BERT works in conjunction with a circuit simulator such as SPICE in order to simulate reliability for actual circuits, and, like SPICE, acts as an interactive tool for design. BERT is introduced and the current work being done is summarized. BERT is used to study the reliability of a BiCMOS inverter chain, and performance data are presented

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; SPICE; bipolar integrated circuits; circuit reliability; digital simulation; failure analysis; BERT; Berkeley reliability tools; BiCMOS circuits; CMOS; MOSFETs; SPICE; bipolar IC; bipolar transistors; building-in-reliability paradigm; circuit degradation; circuit failure rates; design-for-reliability; electromigration; hot-electron degradation; inverter chain; oxide breakdown; performance data; BiCMOS integrated circuits; Bipolar transistors; Bit error rate; Circuit simulation; Degradation; Electric breakdown; Electromigration; MOSFETs; Predictive models; SPICE;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.256927

Filename

256927