• DocumentCode
    1011388
  • Title

    Wire-OR Logic on Transmission Lines

  • Author

    Gustavson, David B. ; Theus, John

  • Author_Institution
    Stanford Linear Accelerator Center
  • Volume
    3
  • Issue
    3
  • fYear
    1983
  • fDate
    6/1/1983 12:00:00 AM
  • Firstpage
    51
  • Lastpage
    55
  • Abstract
    In modern high-speed systems, avoid wire-OR logic in transmission lines whenever possible or make allowances for its foibles.
  • Keywords
    Backplanes; Delay; Diodes; Distributed parameter circuits; Impedance; Linear accelerators; Logic; Steady-state; Transmission lines; Voltage;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.1983.291121
  • Filename
    4070931
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1011388