DocumentCode
1011878
Title
Buffer and Delay Bounds in High Radix Interconnection Networks
Author
Singh, Arjun ; Dally, William J.
Volume
3
Issue
1
fYear
2004
Firstpage
8
Lastpage
8
Abstract
We apply recent results in queueing theory to propose a methodology for bounding the buffer depth and packet delay in high radix interconnection networks. While most work in interconnection networks has been focused on the throughput and average latency in such systems, few studies have been done providing statistical guarantees for buffer depth and packet delays. These parameters are key in the design and performance of a network. We present a methodology for calculating such bounds for a practical high radix network and through extensive simulations show its effectiveness for both bursty and non-bursty injection traffic. Our results suggest that modest speedups and buffer depths enable reliable networks without flow control to be constructed.
Keywords
Convergence; Delay; Intelligent networks; Multiprocessor interconnection networks; Queueing analysis; Supercomputers; Switches; Telecommunication traffic; Throughput; Traffic control;
fLanguage
English
Journal_Title
Computer Architecture Letters
Publisher
ieee
ISSN
1556-6056
Type
jour
DOI
10.1109/L-CA.2004.2
Filename
1650129
Link To Document