• DocumentCode
    1012336
  • Title

    Design implementation of ATM switch with input priority and distributed output buffers

  • Author

    Mukerjee, M.R.

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Univ. of Pertanian Malaysia, Serdang
  • Volume
    31
  • Issue
    20
  • fYear
    1995
  • fDate
    9/28/1995 12:00:00 AM
  • Firstpage
    1715
  • Lastpage
    1716
  • Abstract
    A switch architecture for ATM is described which uses a simple priority module to resolve input contention and a distributed design to permit transfer of input cells to the first free output buffer. The switch has been synthesised using VHDL software and a target generic library and can operate at speeds >400 Mbit/s
  • Keywords
    asynchronous transfer mode; electronic switching systems; hardware description languages; 400 Mbit/s; ATM switch; VHDL software; architecture; design; distributed output buffers; input priority module; target generic library;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19951195
  • Filename
    469208
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1012336