• DocumentCode
    1012874
  • Title

    Multi-objective module placement for 3-D system-on-package

  • Author

    Wong, Eric ; Minz, Jacob ; Lim, Sung Kyu

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    14
  • Issue
    5
  • fYear
    2006
  • fDate
    5/1/2006 12:00:00 AM
  • Firstpage
    553
  • Lastpage
    557
  • Abstract
    System-on-package (SOP) is a viable alternative to system-on-chip (SOC) for meeting the rigorous requirements of today´s mixed-signal system integration. Thermal integrity is arguably the most crucial issue in three-dimensional (3-D) SOP due to the compact nature of the 3-D integration. In addition, the power supply noise issue becomes more serious as the supply voltage continues to decrease while the number of active devices consuming power increases. We propose a 3-D module and decap (decoupling capacitance) placement algorithm that evenly distributes the thermal profile and reduces the power supply noise. In addition, we allocate white spaces around the modules that require decaps to suppress the power supply noise while minimizing the area overhead. In our experimentation, we achieve improvements in both maximum temperature and decap amount with only small increase in area, wirelength, and runtime.
  • Keywords
    circuit noise; mixed analogue-digital integrated circuits; power supply circuits; system-in-package; thermal properties; 3D system on package; decoupling capacitance placement algorithm; mixed signal system integration; multi-objective module placement; power supply noise reduction; thermal profile; white spaces; Active noise reduction; Capacitance; Integrated optics; Optical sensors; Packaging; Power supplies; Radio frequency; Semiconductor device noise; Silicon; Voltage; Floorplanning; thermal via; three-dimensional (3-D) ICs;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2006.876111
  • Filename
    1650233