DocumentCode
1015005
Title
The Reconfigurable Instruction Cell Array
Author
Khawam, Sami ; Nousias, Ioannis ; Milward, Mark ; Yi, Ying ; Muir, Mark ; Arslan, Tughrul
Author_Institution
Spiral Gateway, Edinburgh
Volume
16
Issue
1
fYear
2008
Firstpage
75
Lastpage
85
Abstract
This paper presents a novel instruction cell-based reconfigurable computing architecture for low-power applications, thereafter referred to as the reconfigurable instruction cell array (RICA). For the development of the RICA, a top-down software driven approach was taken and revealed as one of the key design decisions for a flexible, easy to program, low-power architecture. These features make RICA an architecture that inherently solves the main design requirements of modern low-power devices. Results show that it delivers considerably less power consumption when compared to leading VLIW and low-power digital signal processors, but still maintaining their throughput performance.
Keywords
low-power electronics; parallel architectures; reconfigurable architectures; RICA; VLIW; instruction cell-based reconfigurable computing architecture; low-power architecture; low-power device; low-power devices; low-power digital signal processor; low-power digital signal processors; reconfigurable computing architecture; reconfigurable instruction cell array; throughput performance; top-down software driven approach; Computer architecture; Concurrent computing; Costs; Energy consumption; Fabrication; Field programmable gate arrays; Parallel processing; Silicon; Throughput; VLIW; Dynamic reconfiguration; parallel processing; reconfigurable computing;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2007.912133
Filename
4407539
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