Transient Characterization of the Planar DMOS With a Metal/Poly-Si Replacement Gate

In this brief, transient characterization of a novel self-aligned metal/poly-Si gate planar double-diffused MOS (DMOS) transistor for high switching speed and high-efficiency dc/dc converter applications are reported. The breakdown voltage and the threshold voltage of the fabricated metal/poly-Si gate planar DMOS are 36 and 2.1 V, respectively. The gate sheet resistance of the metal/poly-Si gate is around 0.2 O/? , which is 50 times lower than that of the polysilicon gate. The low sheet resistance reduces the switching time, as well as the power loss of the device during the clamped inductive load switching. For a device with a drain current of 69 A/cm2, the turn-on and turn-off times are reduced from 29 to 25 ns and from 36 to 31 ns, respectively. The turn-on and turn-off switching energy losses are reduced by 22% and 15%, respectively.