• DocumentCode
    1016339
  • Title

    Verifying a logic-synthesis algorithm and implementation: a case study in software verification

  • Author

    Aagaard, Mark ; Leeser, Miriam

  • Author_Institution
    Dept. of Comput. Sci., British Columbia Univ., Vancouver, BC, Canada
  • Volume
    21
  • Issue
    10
  • fYear
    1995
  • fDate
    10/1/1995 12:00:00 AM
  • Firstpage
    822
  • Lastpage
    833
  • Abstract
    We describe the verification of a logic synthesis tool with the Nuprl proof development system. The logic synthesis tool, Pbs, implements the weak division algorithm. Pbs consists of approximately 1000 lines of code implemented in a functional subset of Standard ML. It is a proven and usable implementation and is an integral part of the Bedroc high level synthesis system. The program was verified by embedding the subset of Standard ML in Nuprl and then verifying the correctness of the implementation of Pbs in the Nuprl logic. The proof required approximately 500 theorems. In the process of verifying Pbs we developed a consistent approach for using a proof development system to reason about functional programs. The approach hides implementation details and uses higher order theorems to structure proofs and aid in abstract reasoning. Our approach is quite general, should be applicable to any higher order proof system, and can aid in the future verification of large software implementations
  • Keywords
    formal logic; functional programming; high level synthesis; logic design; program verification; theorem proving; Bedroc high level synthesis system; Nuprl logic; Nuprl proof development system; Pbs; Standard ML; abstract reasoning; correctness verification; functional programs; functional subset; higher order proof system; higher order theorems; large software implementations; logic synthesis algorithm verification; logic synthesis tool; logic-synthesis algorithm; software verification; weak division algorithm; Circuit synthesis; Code standards; Computer aided software engineering; Equations; Hardware; High level synthesis; Logic; Software algorithms; Software libraries; Software tools;
  • fLanguage
    English
  • Journal_Title
    Software Engineering, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-5589
  • Type

    jour

  • DOI
    10.1109/32.469458
  • Filename
    469458