• DocumentCode
    1016478
  • Title

    Quasi-SOI MOSFETs—A Promising Bulk Device Candidate for Extremely Scaled Era

  • Author

    Tian, Yu ; Xiao, Han ; Huang, Ru ; Feng, Chuguang ; Chan, Mansun ; Chen, Baoqin ; Wang, Runsheng ; Zhang, Xing ; Wang, Yangyuan

  • Author_Institution
    Peking Univ., Beijing
  • Volume
    54
  • Issue
    7
  • fYear
    2007
  • fDate
    7/1/2007 12:00:00 AM
  • Firstpage
    1784
  • Lastpage
    1788
  • Abstract
    Results from a novel quasi-SOI CMOS architecture fabricated on bulk SI are reported for the first time, demonstrating its viability as an alternative device for the nanometer regime. All of the processing is basically compatible with the conventional CMOS technology. The short-channel effects and the drain-induced barrier-lowering effects can be effectively suppressed by the "L-type" insulator surrounding the source/drain regions. In addition, quasi-SOI MOSFETs can be more tolerant of process- induced variation for the deep nanometer regime. The quasi-SOI MOSFET can be considered as one of the promising candidates for highly scaled devices.
  • Keywords
    CMOS integrated circuits; MOS integrated circuits; elemental semiconductors; nanotechnology; silicon; silicon-on-insulator; L-type insulator; Si-SiO2 - Interface; bulk device structure; conventional CMOS technology; deep nanometer regime; drain-induced barrier-lowering effects; quasiSOI MOSFET; short-channel effects; CMOS process; CMOS technology; Doping; Insulation; Leakage current; MOSFETs; Microelectronics; Nanoscale devices; Semiconductor process modeling; Silicon on insulator technology; CMOS; SOI; drain-induced barrier lowering (DIBL); quasi-SOI; scaling; short-channel effects (SCEs); ultrathin body (UTB);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2007.899401
  • Filename
    4252386