• DocumentCode
    1016766
  • Title

    Content-addressable memory for VLSI pattern inspection

  • Author

    Chae, Soo-ik ; Walker, James T. ; Fu, Chong-cheng ; Pease, R. Fabian

  • Author_Institution
    Center for Integrated Syst., Stanford Univ., CA, USA
  • Volume
    23
  • Issue
    1
  • fYear
    1988
  • Firstpage
    74
  • Lastpage
    78
  • Abstract
    In the template-set approach to VLSI pattern inspection, all patterns in a local window (i.e. a 5*5 array of pixels) that are allowed by the design rules are collected as a template set, and an image in the window centered at each pixel position is compared to the templates to determine whether the pattern is defective. To make this method practical, the number of acceptable templates must be reasonably small and template matching must be fast. By introducing don´t-care conditions into the templates, the number of required templates was reduced. A maskable content-addressable memory was used to implement templates with don´t-care conditions and to permit parallel comparison of an incoming pattern with all templates in the set. A custom VLSI chip was designed with a 2- mu m double-metal CMOS technology, which can perform parallel template matching at the rate of 1.6*10/sup 7/ local images per second.<>
  • Keywords
    CMOS integrated circuits; VLSI; computer vision; computerised pattern recognition; content-addressable storage; inspection; integrated memory circuits; 2 micron; VLSI pattern inspection; custom VLSI chip; double-metal CMOS technology; local images; maskable content-addressable memory; parallel template matching; CADCAM; CMOS technology; Computer aided manufacturing; Design automation; Fabrication; Image storage; Inspection; Integrated circuit technology; Pixel; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.259
  • Filename
    259