Three-dimensional electrostatic effects of carbon nanotube transistors

We explore the three-dimensional (3-D) electrostatics of planar-gate carbon nanotube field-effect transistors (CNTFETs) using a self-consistent solution to the Poisson equation with equilibrium carrier statistics. We examine the effects of the gate insulator thickness and dielectric constant and the source/drain contact geometry on the electrostatics of bottom-gated (BG) and top-gated (TG) devices. We find that the electrostatic scaling length is mostly determined by the gate oxide thickness, not by the oxide dielectric constant. We also find that a high-k gate insulator does not necessarily improve short-channel immunity because it increases the coupling of both the gate and the source/drain contact to the channel. It also increases the parasitic coupling of the source/drain to the gate. Although both the width and the height of the source and drain contacts are important, we find that for the BG device, reducing the width of the 3-D contacts is more effective for improving short channel immunity than reducing the height. The TG device, however, is sensitive to both the width and height of the contact. We find that one-dimensional source and drain contacts promise the best short channel immunity. We also show that an optimized TG device with a thin gate oxide can provide near ideal subthreshold behavior. The results of this paper should provide useful guidance for designing high-performance CNTFETs