• DocumentCode
    1018099
  • Title

    Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs

  • Author

    Patti, Robert S.

  • Author_Institution
    Tezzaron Semicond., Naperville, IL, USA
  • Volume
    94
  • Issue
    6
  • fYear
    2006
  • fDate
    6/1/2006 12:00:00 AM
  • Firstpage
    1214
  • Lastpage
    1224
  • Abstract
    Three-dimensional integrated circuits (3-D ICs) offer significant improvements over two-dimensional circuits, and promise a solution to the severe problems that are being, and will be, encountered as monolithic process geometries are reduced to below 65 nm. Several methods associated with the fabrication of 3-D ICs are discussed in this paper, and the techniques developed by Tezzaron Semiconductor Corp., are described in detail. Four successful 3-D ICs are described, along with the anticipated benefits of applying 3-D design to future system-on-chip (SoC) devices.
  • Keywords
    integrated circuit interconnections; system-on-chip; 3D integrated circuits; integrated circuit interconnections; system-on-chip design; Capacitance; Computational geometry; Costs; Delay; Integrated circuit interconnections; Random access memory; System-on-a-chip; Three-dimensional integrated circuits; Wire; Wiring; Integrated circuit interconnections; three-dimensional integrated circuits (3-D ICs);
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/JPROC.2006.873612
  • Filename
    1652906