A new approach to over-the-cell channel routing with three layers

Author

Terai, Masayuki ; Nakajima, Kazuo ; Takahashi, Kazuhiro ; Sato, Koji

Author_Institution

Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

Volume

13

Issue

2

fYear

1994

fDate

2/1/1994 12:00:00 AM

Firstpage

187

Lastpage

200

Abstract

We introduce a new model for over-the-cell channel routing with three layers. The model consists of two channels and the routing area over a cell row between them. Three and two layers are available for routing in the channels and the over-the-cell routing area, respectively. We formulate the problem of over-the-cell routing as that of channel routing with additional constraints. Based on this formulation, we present an efficient over-the-cell routing algorithm that attempts to minimize the sum of channel densities of the trunks that remain in the channel. The effectiveness of our model and algorithm is demonstrated by our experimental results on industrial sea-of-gates array chips and a well-known benchmark circuit

Keywords

circuit layout; logic arrays; logic design; network routing; VLSI circuit layout; benchmark circuit; channel density sum minimization; over-the-cell channel routing; routing algorithm; routing area; sea-of-gates array chips; three layers; track assignment constraints; trunk selection; Application specific integrated circuits; Design engineering; Integrated circuit modeling; Joining processes; Laboratories; Large scale integration; Phased arrays; Routing; Very large scale integration; Wire;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.259942

Filename

259942