DocumentCode :
1019957
Title :
An efficient analytical approach for extracting the emitter inductance of collector-up HBTs
Author :
Tseng, Hsien-cheng ; Chou, Jung-Hua
Author_Institution :
Dept. of Eng. Sci., Nat. Cheng-Kung Univ., Tainan, Taiwan
Volume :
51
Issue :
7
fYear :
2004
fDate :
7/1/2004 12:00:00 AM
Firstpage :
1200
Lastpage :
1202
Abstract :
An efficient analytical parameter-extraction approach for the emitter inductance in a hybrid-π equivalent circuit of collector-up heterojunction bipolar transistors (HBTs) is developed for the first time. A full set of elements is derived unambiguously from impedance and admittance formulation. The good agreement between measured and simulated S-parameters ensures the accuracy of this method.
Keywords :
S-parameters; equivalent circuits; heterojunction bipolar transistors; inductance measurement; parameter estimation; semiconductor device models; S parameters; admittance formulation; collector-up HBT; emitter inductance extraction; equivalent circuit; heterojunction bipolar transistors; impedance formulation; parameter extraction; semiconductor device modeling; Admittance; Bipolar transistors; Capacitance; Circuit simulation; Equivalent circuits; Frequency; Heterojunction bipolar transistors; Impedance; Inductance; Scattering parameters; HBTs; Heterojunction bipolar transistors; parameter-extraction; semiconductor device modeling;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.829899
Filename :
1308648
Link To Document :
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