Title :
Testability of one-dimensional iterative arrays using a variable testability measure
Author :
Jamoussi, M. ; Kaminska, B. ; Mukhedkar, D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
fDate :
1/1/1994 12:00:00 AM
Abstract :
The issue of testing one-dimensional iterative arrays with a constant number of test vectors independent of their size, determined by a new variable testability measure (VTM), is the objective of this paper. It is shown that VTM is a generalization of the C-testability concept, which predicts a constant number of test vectors for iterative cellular arrays of identical cells, independent of their size. A further development of C-testability, called M-testability, is introduced to deal with more general one-dimensional iterative arrays (nonidentical cells)
Keywords :
cellular arrays; design for testability; integrated circuit testing; logic arrays; logic design; logic testing; C-testability concept; M-testability; iterative cellular arrays; one-dimensional iterative arrays; test vectors; variable testability measure; Circuit testing; Electrical fault detection; Fabrication; High level synthesis; Integrated circuit technology; Large scale integration; Logic arrays; Logic design; Logic testing; Size measurement;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on