• DocumentCode
    1020676
  • Title

    Dual Material Double-Layer Gate Stack SON MOSFET: A Novel Architecture for Enhanced Analog Performance—Part I: Impact of Gate Metal Workfunction Engineering

  • Author

    Kasturi, Poonam ; Saxena, Manoj ; Gupta, Mridula ; Gupta, R.S.

  • Author_Institution
    Delhi Univ., New Delhi
  • Volume
    55
  • Issue
    1
  • fYear
    2008
  • Firstpage
    372
  • Lastpage
    381
  • Abstract
    In this paper, we present a simulation study, using ATLAS-2D, of analog circuit performance metrics for the dual-material gate (DMG) MOSFETs in Part I. Part II focuses on the impact of double-layer gate stack architecture on the analog performance and fT-gain relationship of the silicon-on-nothing MOSFETs with and without DMG. The simulation results in Part I demonstrate that, out of the several combinations in DMG MOSFET design studied, the DMG device with an LM1/L ratio of frac12 amalgamates the advantages of using a high metal workfunction gate M1 and a low metal workfunction gate M2 in the most efficient manner. An increase in early voltage and a reduced output conductance from the DMG MOSFET design are the driving forces for the observed performance improvement.
  • Keywords
    MOSFET; semiconductor device models; work function; ATLAS-2D simulation; dual material double-layer gate stack SON MOSFET; enhanced analog performance; gate metal workfunction engineering; silicon-on-nothing MOSFET; Analog circuits; CMOS process; Circuit simulation; Dielectric materials; Electrodes; FETs; Inorganic materials; MOSFET circuits; Silicon; Threshold voltage; ATLAS-2D; dual-material gate (DMG); silicon-on-nothing MOSFET (SON MOSFET);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2007.910564
  • Filename
    4408786