Device Design and Optimization Methodology for Leakage and Variability Reduction in Sub-45-nm FD/SOI SRAM

Ultrathin-body fully depleted silicon-on-insulator (UTB FD/SOI) devices have emerged as a possible candidate in sub-45-nm technologies and beyond. This paper analyzes leakage and stability of FD/SOI 6T SRAM cell and presents a device design and optimization strategy for low-power and stable SRAM applications. We show that large variability and asymmetry in threshold-voltage distribution due to random dopant fluctuation (RDF) significantly increase leakage spread and degrade stability of FD/SOI SRAM cell. We propose to optimize FD devices using thinner buried oxide (BOX) structure and lower body doping combined with negative back-bias or workfunction engineering in reducing the RDF effect. Our analysis shows that thinner BOX and cooptimization of body doping and back biasing are efficient in designing low-power and stable FD/SOI SRAM cell in sub-45-nm nodes.