• DocumentCode
    1021478
  • Title

    Guest Editorial Special Section on Configurable Computing Design—II: Hardware Level Reconfiguration

  • Author

    Plaks, Toomas P.

  • Volume
    16
  • Issue
    2
  • fYear
    2008
  • Firstpage
    113
  • Lastpage
    114
  • Abstract
    The eight papers in this special section address the issue of configurable computing design. These papers focus on hardware level problems: how to build efficient gate arrays; security and fault tolerance issues on configurable hardware; and implementing floating-point arithmetic and specific decoders on field-programmable gate arrays (FPGAs).
  • Keywords
    Decoding; Fault tolerance; Field programmable gate arrays; Floating-point arithmetic; Hardware; Logic arrays; Reconfigurable logic; Security; Stochastic processes; Uncertainty;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2007.914084
  • Filename
    4410460
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1021478