DocumentCode :
1025870
Title :
Cost-sensitive partitioning in an architecture synthesis system for multicluster processors
Author :
Chu, Michael L. ; Fan, Kevin C. ; Ravindran, Rajiv A. ; Mahlke, Scott A.
Author_Institution :
Michigan Univ., Ann Arbor, MI, USA
Volume :
24
Issue :
3
fYear :
2004
Firstpage :
10
Lastpage :
20
Abstract :
Application-specific instruction processors (ASIPs) have great potential to meet the challenging demands of pervasive systems. This hierarchical system automatically designs highly customized multicluster processors. In the first of two tightly coupled components, design space exploration heuristically searches the basic capabilities that define the processor´s overall parallelism. In the second, a hardware compiler determines the detailed architecture configuration that realizes the parallelism.
Keywords :
multiprocessing systems; parallel architectures; workstation clusters; application-specific instruction processors; architecture synthesis system; cost-sensitive partitioning; hardware compiler; multicluster processors; pervasive systems; Algorithm design and analysis; Application specific processors; Computer architecture; Costs; Hardware; Parallel processing; Portable computers; Power generation; Space exploration; Streaming media;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2004.7
Filename :
1310262
Link To Document :
بازگشت