DocumentCode :
1026539
Title :
Analyzing multichip module testing strategies
Author :
Abadir, M.S. ; Parikh, A.R. ; Sandborn, P.A. ; Drake, Ken ; Bal, Linda
Author_Institution :
Microelectron. & Comput. Technol. Corp., Austin, TX, USA
Volume :
11
Issue :
1
fYear :
1994
Firstpage :
40
Lastpage :
52
Abstract :
Incorporating test and fault diagnosis as critical design requirements is necessary to achieve high-quality, cost-effective multichip systems. However, evaluating where and when to test, and deciding upon the best test method and level, take considerable study. The authors explore the trade-offs between various MCM test and rework strategies, then analyze the impact of cost, yield, and test effectiveness of the final cost and quality. This analysis of the trade-offs associated with test strategies for complex multichip systems and modules clearly indicate that incorporating DFT and BIST with varying degrees at the chip or MCM levels is economically justifiable. These methods result in cost reduction as well as quality improvement, and indicate that the MCM cost could vary by about 10% to 20%, depending on the test strategy used. However, proper determination of where and how to test, and whether to employ DFT and BIST at the IC or MCM levels, require an evaluation of the economics of the various solutions and the payback. This process is highly dependent on the design under consideration and the parameters associated with the available manufacturing environments.<>
Keywords :
built-in self test; computer testing; design for testability; hybrid integrated circuits; integrated circuit testing; multichip modules; BIST; DFT; IC; MCM test; complex multichip systems; cost reduction; cost-effective multichip systems; critical design requirements; fault diagnosis; manufacturing environments; multichip module testing strategies; quality improvement; rework strategies; test effectiveness; test strategies; Assembly; Circuit testing; Costs; Delay; Integrated circuit interconnections; Integrated circuit testing; Multichip modules; Packaging; Probes; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.262321
Filename :
262321
Link To Document :
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