Dynamic Power Model of CMOS Gates Driving Transmission Lines Based on Fourier Analysis

This paper presents an analytical dynamic power model of CMOS gates driving transmission lines with distributed RLC parameters. It is shown that at high signal frequency, where the output voltage at the termination of a transmission line may not reach the steady state during a signal period, the charge and voltage at the end of the period become the initial conditions of the following periods and have a significant effect on dynamic power consumption. The proposed model takes these initial conditions into account, since it is based on Fourier series analysis. In this model, the dynamic power consumption is approximated by the summation of the first several Fourier-series-based terms. The accuracy of the model increases with the number of series terms, and arbitrary accuracy can be obtained by including appropriate number of the terms in the model. The model is much faster than simulation program with integrated circuit emphasis (SPICE), and its computational complexity is linear with the number of terms included. The model is also extended to CMOS gates driving distributed RLC trees and coupled multiconductor transmission lines.