DocumentCode
1029184
Title
Validation of the atlas trigger/daq network architecture using hardware data emulators
Author
LeVine, Micheal J. ; Stancu, S. ; Haeberli, Christian ; Tremblet, L. ; Beuran, R. ; Meirosu, C. ; Dobinson, R.W. ; Martin, B. ; Knezo, E. ; Beck, Hans Peter ; Hauser, Reiner ; Botterill, D.
Author_Institution
Brookhaven Nat. Lab., Upton, NY, USA
Volume
51
Issue
3
fYear
2004
fDate
6/1/2004 12:00:00 AM
Firstpage
539
Lastpage
544
Abstract
Hardware data emulators are used to deploy a large-scale model of the ATLAS data acquisition architecture. The emulators, based on FPGAs and on the Alteon gigabit Ethernet NIC, are described, and their performance determined. The emulators are used in the large-scale test bed; sample results are presented.
Keywords
data acquisition; field programmable gate arrays; local area networks; position sensitive particle detectors; readout electronics; ATLAS Trigger/DAQ network architecture; ATLAS data acquisition architecture; Alteon gigabit Ethernet NIC; FPGA; hardware data emulators; large-scale model; large-scale test bed; Data acquisition; Design for manufacture; Ethernet networks; Field programmable gate arrays; Hardware; Helium; Laboratories; Large-scale systems; Protocols; System testing; Data acquisition; Ethernet; emulators; networks;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2004.829381
Filename
1310554
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