• DocumentCode
    1030748
  • Title

    High-yield processing for fixed interconnect LSI arrays

  • Author

    Dingwall, A.G.F.

  • Volume
    15
  • Issue
    6
  • fYear
    1968
  • fDate
    6/1/1968 12:00:00 AM
  • Firstpage
    409
  • Lastpage
    409
  • Keywords
    Costs; Integrated circuit interconnections; Integrated circuit modeling; Large scale integration; Logic arrays; Logic circuits; Packaging; Semiconductor device modeling; Shift registers; Thin film circuits;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1968.16199
  • Filename
    1475101
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1030748