• DocumentCode
    1031949
  • Title

    High-speed GaAs 4Ã\x974-bit parallel multiplier using super capacitor FET logic

  • Author

    Lowe, K.S.

  • Author_Institution
    Bell-Northern Research, Ottawa, Canada
  • Volume
    23
  • Issue
    8
  • fYear
    1987
  • Firstpage
    425
  • Lastpage
    426
  • Abstract
    An ECL-compatible 4×4-bit parallel multiplier implemented using the GaAs D-MESFET logic approach of super capacitor FET logic has been realised. Fully functional circuit operation was obtained with a worst-case multiplication time of 1.4 ns (88 ps/gate) at 1.6 W dissipation, the best speed ever reported for a multiplier fabricated with GaAs MESFET technology.
  • Keywords
    III-V semiconductors; field effect integrated circuits; integrated logic circuits; multiplying circuits; 1.4 ns; 1.6 W; D-MESFET logic; ECL-compatible; GaAs; parallel multiplier; super capacitor FET logic; worst-case multiplication time;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19870308
  • Filename
    4257637
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1031949