• DocumentCode
    1032552
  • Title

    Multivalued dynamic circuits

  • Author

    Huertas, Jose Luis ; Barriga, Angel ; S¿¿nchez-G¿¿mez, G.

  • Author_Institution
    Universidad de Sevilla, Departamento de Electricidad y Electrónica, Facultad de FÃ\xadsica, Sevilla, Spain
  • Volume
    23
  • Issue
    10
  • fYear
    1987
  • Firstpage
    502
  • Lastpage
    504
  • Abstract
    A new family of multivalued logic circuits is presented. These circuits exhibit some appealing features: they are the first MV dynamic operators reported in the literature, they implement the Vranesic-Smith-Lee algebra (which is specially suited for arithmetic operations), and their performance has been found to be similar to binary counterparts by simulation.
  • Keywords
    digital arithmetic; logic circuits; logic design; many-valued logics; Vranesic-Smith-Lee algebra; arithmetic operations; logic design; multivalued dynamic operators; multivalued logic circuits; simulation;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19870364
  • Filename
    4257695
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1032552