Plated wire magnetic logic using resistive coupling

A thin film plated wire technique for producing large capacity digital delay lines is described, as well as the circuitry and experimental observations on laboratory designed models. The primary advantage of the scheme is the potential economy of the circuit which is amenable generally to batch fabrication techniques. Observed bit rate capabilities are 5 MHz for a 4-phase-driven arrangement and 3.3 MHz for a similar 3-phased circuit. The number of individual film elements each with an associated coupling resister is 1.33 per bit in the 4-phased case and 1.5 per bit in the 3-phased case, so that element utilization approaches that of a random access memory. The capacity of anisotropic thin films to provide signal flux gains in a sequential circuit is discussed in relation to the delay line operation. Included also is a brief discussion of the relatively large tolerances exhibited with respect to component parameters and drive signals.