DocumentCode

1034058

Title

High-speed DRO plated-wire memory system

Author

Finch, T. ; Waaben, S.

Author_Institution

Bell Telephone Laboratories, Murray Hill, N.J.

Volume

2

Issue

3

fYear

1966

fDate

9/1/1966 12:00:00 AM

Firstpage

529

Lastpage

529

Keywords

Plated-wire memories; Circuits; Delay; Diodes; Impedance; Logic; Packaging; Read-write memory; Registers; Transmission line matrix methods; Wire;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/TMAG.1966.1065940

Filename

1065940