DocumentCode :
1035476
Title :
8-bit micropower algorithmic A/D convertor
Author :
Valencic, V. ; Deval, P. ; Krummenacher, Francois
Author_Institution :
Ecole Polytechnique Fédérale, Laboratoire d´Electronique Générale, Lausanne, Switzerland
Volume :
23
Issue :
18
fYear :
1987
Firstpage :
932
Lastpage :
933
Abstract :
A switched-capacitor algorithmic A/D convertor is described, in which the amplifier offset compensation is inherent to the circuit structure and the effect of clock-feedthrough is as low as 0.5 mV. Preliminary experimental results, obtained on circuits fabricated using a low-voltage CMOS technology, indicate 8-bit resolution for 15 kHz sampling frequency, with only 350 ¿W power consumption.
Keywords :
CMOS integrated circuits; analogue-digital conversion; switched capacitor networks; 15 kHz; 350 muW; 8 bit; ADC; algorithmic A/D convertor; amplifier offset compensation; clock-feedthrough; low-voltage CMOS technology; microwatt power consumption; monolithic IC; switched-capacitor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19870657
Filename :
4257996
Link To Document :
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