Title :
An approximation to the factor K in the Toh-Ko-Meyer MOS engineering model
Author :
Lo, Carrie C. ; Li, G.P. ; Mulligan, J.H., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
fDate :
1/1/1994 12:00:00 AM
Abstract :
An approximate expression for the factor K used in the Toh-Ko-Meyer MOS engineering model is derived. The approximate expression presented allows one to compute directly the saturation current and the saturation voltage with given device dimensions and biasing voltages without the need for iteration.
Keywords :
metal-insulator-semiconductor devices; semiconductor device models; MOD devices; MOS engineering model; Toh-Ko-Meyer model; biasing voltages; device dimensions; factor K approximation; saturation current; saturation voltage; Artificial intelligence; Capacitance; Circuits; Design engineering; Equations; MOS devices; Signal design; Taylor series; Threshold voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
