Novel low-voltage low-power full-swing BiCMOS circuits

Author

Elrabaa, Muhammad S. ; Obrecht, Michael S. ; Elmasry, Mohamed I.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

29

Issue

2

fYear

1994

fDate

2/1/1994 12:00:00 AM

Firstpage

86

Lastpage

94

Abstract

A novel BiCMOS full-swing circuit technique with superior performance over CMOS down to 1.5 V is proposed. A conventional noncomplementary BiCMOS process is used. The proposed pull-up configuration is based on a capacitively coupled feedback circuit. Several pull-down options were examined and compared, and the results are reported. Several cells were implemented using the novel circuit technique; simple buffers, logic gates, and master-slave latches. Their performance, regarding speed, area, and power, was compared to that of CMOS for different technologies and supply voltages. Both device and circuit simulations were used. A design procedure for the feedback circuit and the effects of scaling on that procedure were studied and reported

Keywords

BiCMOS integrated circuits; buffer circuits; circuit analysis computing; flip-flops; integrated logic circuits; transient response; 1.5 V; 2D electron concentration; BiCMOS full-swing circuit technique; buffers; capacitively coupled feedback circuit; circuit simulation; device simulation; feedback circuit design; logic gates; master-slave latches; noncomplementary BiCMOS process; pull-up configuration; scaling; transient response; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Coupling circuits; Feedback circuits; Latches; Logic circuits; Logic devices; Logic gates; Master-slave;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.272111

Filename

272111