Title :
Self-aligned diffusion technique for n-InP JFETs
Author :
Fan, C. ; Yu, P.K.L.
Author_Institution :
University of California at San Diego, Department of Electrical & Computer Engineering, La Jolla, USA
Abstract :
A self-aligned diffusion process has been demonstrated in the fabrication of n-InP JFETs on semi-insulating InP. This process utilises the anisotropic and selective etching properties of InP/GaInAs materials. Using this technique, sub-micrometre gate lengths can be achieved even with conventional photolithography. Devices with trans-conductance of >35mS/mm, leakage current of < 10nA/mm and gate capacitance of <0.7pF/mm have been fabricated with a cutoff frequency of 7 GHz.
Keywords :
III-V semiconductors; indium compounds; junction gate field effect transistors; semiconductor technology; solid-state microwave devices; 7 GHz; InP-GaInAs; anisotropic etching; conventional photolithography; cutoff frequency; fabrication; gate capacitance; leakage current; n-InP JFETs; selective etching properties; self-aligned diffusion process; semiconductor diffusion; semiinsulating InP; submicrometre gate lengths; transconductance;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870689
