Title :
Tester architecture for a time-division switch
Author :
Jajszczyk, Andrzej ; Tyszer, J.
Author_Institution :
Technical University of Poznan, Institute of Electronics & Communications, Poznan, Poland
Abstract :
A tester architecture for time-space switches as well as the appropriate testing method are proposed. This architecture makes it possible to detect all stuck-type faults in a digital switch in a reasonable time.
Keywords :
automatic test equipment; electronic equipment testing; fault location; multiplexing equipment; switching systems; time division multiplexing; digital switch; fault detection; stuck-type faults; tester architecture; time-division switch; time-space switches;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870744
