DocumentCode
1036725
Title
Parallel merger
Author
Liu, G.S.
Author_Institution
Tatung Institute of Technology, Department of Electrical Engineering, Taipei, Republic of China
Volume
23
Issue
20
fYear
1987
Firstpage
1069
Lastpage
1070
Abstract
The letter describes a parallel merger for the sort-merger scheme in a hardware sorter. The technique offers k times the data throughput of conventional hardware k-way mergers.
Keywords
buffer storage; parallel architectures; architecture design technique; comparators; data throughput enhancement; hardware k-way mergers; hardware sorter; interleaving buffers; parallel merger; parallel processing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19870747
Filename
4258984
Link To Document