• DocumentCode
    1037057
  • Title

    DTPL all-magnetic logic networks

  • Author

    Jauvtis, Harvey I. ; Spain, R.

  • Author_Institution
    Electronics Division of Laboratory for Electronics, Inc., Boston, Mass.
  • Volume
    4
  • Issue
    3
  • fYear
    1968
  • fDate
    9/1/1968 12:00:00 AM
  • Firstpage
    537
  • Lastpage
    540
  • Abstract
    The design and principles of operation of two-layer domain tip propagation logic (DTPL) set-reset and complementing flip-flops are described. These magnetic thin film devices demonstrate how the inherent delay in the propagation of channeled domain tips together with the basic DTPL logic elements (inhibit gates, fan-outs, crossovers, film-film transfers, and magnetic diodes) permit logic operations to be performed in a unique manner. Peculiar to the flip-flop devices is the fact that specific channels are continuously switched and reset by a fixed pulse sequence, although the overall network may be considered as existing in a given stable state. A ripple-carry binary counter constructed by interconnecting several similar complementing flip-flop (binary counter) stages and DTPL AND gates in a single two-layer structure is discussed.
  • Keywords
    Logic circuits; Magnetic domains; Counting circuits; Flip-flops; Logic design; Logic devices; Logic gates; Magnetic devices; Magnetic domains; Magnetic films; Page description languages; Propagation delay;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.1968.1066218
  • Filename
    1066218