Title :
3 μm VLSI processing element using the CORDIC algorithm
Author :
Vaudin, G.J. ; Nudd, G.R.
Author_Institution :
University of Warwick, VLSI Architectures Group Department of Computer Science, Coventry, UK
Abstract :
A VLSI implementation of a unified algorithm with the capability of computing all the common arithmetic operations, including division, square rooting etc. and most trigonometric functions, is described. The processor has been designed in 3 μm CMOS technology such that when organised in a pipeline array it can achieve computation rates equivalent to 50 ns, suitable for most real-time signal and image processing applications.
Keywords :
CMOS integrated circuits; VLSI; digital arithmetic; picture processing; signal processing; CMOS technology; Cordic algorithm; VLSI implementation; common arithmetic operations; division; image processing; pipeline array; real-time signal; square rooting; trigonometric functions;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870811
