Application of the distributed equilibrium equivalent circuit model to semiconductor junctions

The small-signal equivalent circuits for a p-n junction at equilibrium and the MOS capacitor in the inversion range are derived from the general transmission line model. Detailed calculations are made to obtain the semiconductor admittance as a function of frequency for a gold-doped n-type silicon substrate. The transmission-line model provides the desired distributed time constant observed in experimental data of admittance versus frequency. A simple model is given to illustrate how the low-frequency junction capacitance depends on the position of the deep level recombination center in the band gap and the ratio of the hole and electron emission rates. Experimental results on gold-doped silicon junctions are analyzed in terms of the theoretical model, considering effects of this ratio, the effects of surface channels, and the effect of a nonuniform spatial variation of the gold impurity.